ds064 (v6.3) april 3, 2006 www.xilinx.com 1 product specification ? 1996-2006 xilinx, inc. all rights reserved. all xilinx trademarks, registered trademarks, patents, and disclaimers are as lis ted at http://www.xilinx.com/legal.htm . all other trademarks and registered trademarks are the property of their respective owners. all specifications are subject to c hange without notice. features ? 5 ns pin-to-pin logic delays on all pins ?f cnt to 100 mhz ? 36 macrocells with 800 usable gates ? up to 34 user i/o pins ? 5v in-system programmable - endurance of 10,000 program/erase cycles - program/erase over full commercial voltage and temperature range ? enhanced pin-locking architecture ? flexible 36v18 function block - 90 product terms drive any or all of 18 macrocells within function block - global and product term clocks, output enables, set and reset signals ? extensive ieee std 1149.1 boundary-scan (jtag) support ? programmable power reduction mode in each macrocell ? slew rate control on individual outputs ? user programmable ground pin capability ? extended pattern security features for design protection ? high-drive 24 ma outputs ? 3.3v or 5v i/o capability ? advanced cmos 5v fastflash? technology ? supports parallel programming of more than one xc9500 concurrently ? available in 44-pin plcc, 44-pin vqfp, 48-pin csp packages description the xc9536 is a high-performance cpld providing advanced in-system programming and test capabilities for general purpose logic integration. it is comprised of eight 36v18 function blocks, providing 800 usable gates with propagation delays of 5 ns. see figure 2 for the architecture overview. power management power dissipation can be reduced in the xc9536 by config- uring macrocells to standard or low-power modes of opera- tion. unused macrocells are turned off to minimize power dissipation. operating current for each design can be approximated for specific operating conditions using the following equation: i cc (ma) = mc hp (1.7) + mc lp (0.9) + mc (0.006 ma/mhz) f where: mc hp = macrocells in high-performance mode mc lp = macrocells in low-power mode mc = total number of macrocells used f = clock frequency (mhz) figure 1 shows a typical calculation for the xc9536 device. 0 xc9536 in-system programmable cpld ds064 (v6.3) april 3, 2006 05 product specification r figure 1: typical i cc vs. frequency for xc9536 clock frequency (mhz) typical i cc (ma) 050 (50) (30) (83) (50) 100 high performance low power ds064_01_110101
xc9536 in-system programmable cpld 2 www.xilinx.com ds064 (v6.3) april 3, 2006 product specification r figure 2: xc9536 architecture function block outputs (indicated by the bold line) drive the i/o blocks directly. in-system programming controller jtag controller i/o blocks function block 1 macrocells 1 to 18 macrocells 1 to 18 jtag port 3 36 i/o/gts i/o/gsr i/o/gck i/o i/o i/o i/o 2 1 i/o i/o i/o i/o 3 ds064_02_110101 1 function block 2 36 18 18 fast connect ii switch matrix
xc9536 in-system programmable cpld ds064 (v6.3) april 3, 2006 www.xilinx.com 3 product specification r absolute maximum ratings recommended operation conditions quality and reliability characteristics dc characteristic over recommended operating conditions symbol description value units v cc supply voltage relative to gnd ?0.5 to 7.0 v v in input voltage relative to gnd ?0.5 to v cc + 0.5 v v ts voltage applied to 3-state output ?0.5 to v cc + 0.5 v t stg storage temperature (ambient) ?65 to +150 o c t j junction temperature +150 o c notes: 1. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under operating condi tions is not implied. exposure to absolute maximum ratings conditions for extended periods of time may affect device reliability. symbol parameter min max units v ccint supply voltage for internal logic and input buffers commercial t a = 0 o c to 70 o c 4.75 5.25 v industrial t a = ?40 o c to +85 o c4.5 5.5 v ccio supply voltage for output drivers for 5v operation commercial t a = 0 o c to 70 o c 4.75 5.25 v industrial t a = ?40 o c to +85 o c4.5 5.5 supply voltage for output drivers for 3.3v operation 3.0 3.6 v il low-level input voltage 0 0.80 v v ih high-level input voltage 2.0 v ccint + 0.5 v v o output voltage 0 v ccio v symbol parameter min max units t dr data retention 20 - years n pe program/erase cycles (endurance) 10,000 - cycles symbol parameter test conditions min max units v oh output high voltage for 5v outputs i oh = ?4.0 ma, v cc = min 2.4 - v output high voltage for 3.3v outputs i oh = ?3.2 ma, v cc = min 2.4 - v v ol output low voltage for 5v outputs i ol = 24 ma, v cc = min - 0.5 v output low voltage for 3.3v outputs i ol = 10 ma, v cc = min - 0.4 v i il input leakage current v cc = max v in = gnd or v cc -10 a i ih i/o high-z leakage current v cc = max v in = gnd or v cc -10 a c in i/o capacitance v in = gnd f = 1.0 mhz -10pf i cc operating supply current (low power mode, active) v i = gnd, no load f = 1.0 mhz 30 (typical) ma
xc9536 in-system programmable cpld 4 www.xilinx.com ds064 (v6.3) april 3, 2006 product specification r ac characteristics symbol parameter xc9536-5 xc9536-6 xc9536-7 xc9536-10 xc9536-15 units min max min max min max min max min max t pd i/o to output valid - 5.0 - 6.0 - 7.5 - 10.0 - 15.0 ns t su i/o setup time before gck 3.5 - 3.5 - 4.5 - 6.0 - 8.0 - ns t h i/o hold time after gck 0 - 0 - 0 - 0 - 0 - ns t co gck to output valid - 4.0 - 4.0 - 4.5 - 6.0 - 8.0 ns f cnt (1) 16-bit counter frequency 100.0 - 100.0 - 125.0 - 111.1 - 95.2 - mhz f system (2) multiple fb internal operating frequency 100.0 - 100.0 - 83.3 - 66.7 - 55.6 - mhz t psu i/o setup time before p-term clock input 0.5 - 0.5 - 0.5 - 2.0 - 4.0 - ns t ph i/o hold time after p-term clock input 3.0 - 3.0 - 4.0 - 4.0 - 4.0 - ns t pco p-term clock output valid - 7.0 - 7.0 - 8.5 - 10.0 - 12.0 ns t oe gts to output valid - 5.0 - 5.0 - 5.5 - 6.0 - 11.0 ns t od gts to output disable - 5.0 - 5.0 - 5.5 - 6.0 - 11.0 ns t poe product term oe to output enabled - 9.0 - 9.0 - 9.5 - 10.0 - 14.0 ns t pod product term oe to output disabled - 9.0 - 9.0 - 9.5 - 10.0 - 14.0 ns t wlh gck pulse width (high or low) 4.0 - 4.0 - 4.0 - 4.5 - 5.5 - ns t aprpw asynchronous preset/reset pulse width (high or low) 7.0 - 7.0 - 7.0 - 7.5 - 8.0 - ns notes: 1. f cnt is the fastest 16-bit counter frequency available, using the local feedback when applicable. f cnt is also the export control maximum flip-flop toggle rate, f tog . 2. f system is the internal operating frequency for general purpose system designs spanning multiple fbs. figure 3: ac load circuit device output output type v test 5.0v 3.3v v test r 1 160 260 r 1 r 2 c l r 2 120 360 c l 35 pf 35 pf ds067_03_110101 v ccio 5.0v 3.3v
xc9536 in-system programmable cpld ds064 (v6.3) april 3, 2006 www.xilinx.com 5 product specification r internal timing parameters symbol parameter xc9536-5 xc9536-6 xc9536-7 xc9536-10 xc9536-15 units minmaxminmaxminmaxminmaxminmax buffer delays t in input buffer delay - 1.5 - 1.5 - 2.5 - 3.5 - 4.5 ns t gck gck buffer delay - 1.5 - 1.5 - 1.5 - 2.5 - 3.0 ns t gsr gsr buffer delay - 4.0 - 4.0 - 4.5 - 6.0 - 7.5 ns t gts gts buffer delay - 5.0 - 5.0 - 5.5 - 6.0 - 11.0 ns t out output buffer delay - 2.0 - 2.0 - 2.5 - 3.0 - 4.5 ns t en output buffer enable/disable delay - 0 - 0 - 0 - 0 - 0 ns product term control delays t ptck product term clock delay - 3.0 - 3.0 - 3.0 - 3.0 - 2.5 ns t ptsr product term set/reset delay - 1.0 - 1.0 - 2.0 - 2.5 - 3.0 ns t ptts product term 3-state delay - 5.5 - 5.5 - 4.5 - 3.5 - 5.0 ns internal register and combinatorial delays t pdi combinatorial logic propagation delay - 0.5 - 0.5 - 0.5 - 1.0 - 3.0 ns t sui register setup time 2.5 - 2.5 - 1.5 - 2.5 - 3.5 - ns t hi register hold time 1.0 - 1.0 - 3.0 - 3.5 - 4.5 - ns t coi register clock to output valid time - 0.5 - 0.5 - 0.5 - 0.5 - 0.5 ns t aoi register async. s/r to output delay - 6.0 - 6.0 - 6.5 - 7.0 - 8.0 ns t rai register async. s/r recover before clock 5.0 - 5.0 - 7.5 - 10.0 - 10.0 - ns t logi internal logic delay - 1.0 - 1.0 - 2.0 - 2.5 - 3.0 ns t logilp internal low power logic delay - 9.0 - 9.0 - 10.0 - 11.0 - 11.5 ns feedback delays t f fastconnect feedback delay - 6.0 - 6.0 - 8.0 - 9.5 - 11.0 ns time adders t pta (1) incremental product term allocator delay - 0.8 - 0.8 - 1.0 - 1.0 - 1.0 ns t slew slew-rate limited delay - 3.5 - 3.5 - 4.0 - 4.5 - 5.0 ns notes: 1. t pta is multiplied by the span of the function as defined in the xc9500 family data sheet.
xc9536 in-system programmable cpld 6 www.xilinx.com ds064 (v6.3) april 3, 2006 product specification r xc9536 i/o pins xc9536 global, jtag and power pins function block macroce ll pc44 vq44 cs48 bsca n order function block macroce ll pc44 vq44 cs48 bsca n order 1 1 2 40 d6 105 2 1 1 39 d7 51 1 2 3 41 c7 102 2 2 44 38 e5 48 1 3 5 [1] 43 [1] b7 [1] 99 2 3 42 [1] 36 [1] e6 [1] 45 1 4 4 42 c6 96 2 4 43 37 e7 42 1 5 6 [1] 44 [1] b6 [1] 93 2 5 40 [1] 34 [1] f6 [1] 39 1 6 8 2a690 2 6 39 [1] 33 [1] g7 [1] 36 1 7 7 [1] 1 [1] a7 [1] 87 2 7 38 32 g6 33 1 8 9 3c584 2 8 3731f530 1 9 11 5b581 2 9 3630g527 1 10 12 6 a4 78 2 10 35 29 f4 24 1 11 13 7 b4 75 2 11 34 28 g4 21 1 12 14 8 a3 72 2 12 33 27 e3 18 1 13 18 12 b2 69 2 13 29 23 f2 15 1 14 19 13 b1 66 2 14 28 22 g1 12 1 15 20 14 c2 63 2 15 27 21 f1 9 1 16 22 16 c3 60 2 16 26 20 e2 6 1 17 24 18 d2 57 2 17 25 19 e1 3 118??-54 218---0 notes: : 1. global control pin. pin type pc44 vq44 cs48 i/o/gck1 5 43 b7 i/o/gck2 6 44 b6 i/o/gck3 7 1 a7 i/o/gts1 42 36 e6 i/o/gts2 40 34 f6 i/o/gsr 39 33 g7 tck 17 11 a1 tdi 15 9 b3 tdo 30 24 g2 tms 16 10 a2 v ccint 5v 21, 41 15, 35 c1,f7 v ccio 3.3v/5v 32 26 g3 gnd 23, 10, 31 17, 4, 25 a5, d1, f3 no connects ? ? c4, d3, d4, e4
xc9536 in-system programmable cpld ds064 (v6.3) april 3, 2006 www.xilinx.com 7 product specification r device part marking and ordering combination information device ordering and part marking number speed (pin-to-pin delay) pkg. symbol no. of pins package type operating range (1) xc9536-5pc44c 5 ns pc44 44-pin plastic lead chip carrier (plcc) c xc9536-5pcg44c 5 ns pcg44 44-pin plastic lead chip carrier (plcc); pb-free c xc9536-5vq44c 5 ns vq44 44-pin very thin quad flat pack (vqfp) c xc9536-5vqg44c 5 ns vqg44 44-pin very thin quad flat pack (vqfp); pb-free c xc9536-5cs48c 5 ns cs48 48-ball chip scale package (csp) c xc9536-5csg48c 5 ns csg48 48-ball chip scale package (csp); pb-free c xc9536-6pc44c 6 ns pc44 44-pin plastic lead chip carrier (plcc) c xc9536-6pcg44c 6 ns pcg44 44-pin plastic lead chip carrier (plcc); pb-free c xc9536-6vq44c 6 ns vq44 44-pin very thin quad flat pack (vqfp) c XC9536-6VQG44C 6 ns vqg44 44-pin very thin quad flat pack (vqfp); pb-free c xc9536-7pc44c 7.5 ns pc44 44-pin plastic lead chip carrier (plcc) c xc9536-7pcg44c 7.5 ns pcg44 44-pin plastic lead chip carrier (plcc); pb-free c xc9536-7vq44c 7.5 ns vq44 44-pin very thin quad flat pack (vqfp) c xc9536-7vqg44c 7.5 ns vqg44 44-pin very thin quad flat pack (vqfp); pb-free c xc9536-7cs48c 7.5 ns cs48 48-ball chip scale package (csp) c xc9536-7csg48c 7.5 ns csg48 48-ball chip scale package (csp); pb-free c xc9536-7pc44i 7.5 ns pc44 44-pin plastic lead chip carrier (plcc) i xc9536-7pcg44i 7.5 ns pcg44 44-pin plastic lead chip carrier (plcc); pb-free i xc9536-7vq44i 7.5 ns vq44 44-pin very thin quad flat pack (vqfp) i xc9536-7vqg44i 7.5 ns vqg44 44-pin very thin quad flat pack (vqfp); pb-free i xc9536-10pc44c 10 ns pc44 44-pin plastic lead chip carrier (plcc) c xc9536-10pcg44c 10 ns pcg44 44-pin plastic lead chip carrier (plcc); pb-free c xc9536-10vq44c 10 ns vq44 44-pin very thin quad flat pack (vqfp) c xc95xxx tq144 7c device type package speed operating range this line not related to device part number sample package with part marking. r 1 notes: 1. due to the small size of chip scale packages, part marking on these packages does not follow the above sample and the complete part number cannot be included in the marking. part marking on chip scale packages by line: line 1 = x (xilinx logo), then truncated part number (no xc), i.e., 95xxx. line 2 = not related to device part number. line 3 = not related to device part number. line 4 = package code, speed, operating temperature, three digits not related to device part number. package code: c1 = cs48.
xc9536 in-system programmable cpld 8 www.xilinx.com ds064 (v6.3) april 3, 2006 product specification r warranty disclaimer these products are subject to the terms of the xilinx limited warranty which can be viewed at http://www.xilinx.com/warranty.htm . this limited warranty does not extend to any use of the products in an application or environment that is not within the specifications stated on the then-current xilinx data sheet for the products. products are not designed to be fail-safe and are not warranted for use in applications that pose a risk of physical harm or loss of life. use of products in such applications is fully at the risk of customer subject to applicable laws and regulations. revision history the following table shows the revision history for this document. xc9536-10vqg44c 10 ns vqg44 44-pin very thin quad flat pack (vqfp); pb-free c xc9536-10cs48c 10 ns cs48 48-ball chip scale package (csp) c xc9536-10csg48c 10 ns csg48 48-ball chip scale package (csp); pb-free c xc9536-10pc44i 10 ns pc44 44-pin plastic lead chip carrier (plcc) i xc9536-10pcg44i 10 ns pcg44 44-pin plastic lead chip carrier (plcc); pb-free i xc9536-10vq44i 10 ns vq44 44-pin very thin quad flat pack (vqfp) i xc9536-10vqg44i 10 ns vqg44 44-pin very thin quad flat pack (vqfp); pb-free i xc9536-10cs48i 10 ns cs48 48-ball chip scale package (csp) i xc9536-10csg48i 10 ns csg48 48-ball chip scale package (csp); pb-free i xc9536-15pc44c 15 ns pc44 44-pin plastic lead chip carrier (plcc) c xc9536-15pcg44c 15 ns pcg44 44-pin plastic lead chip carrier (plcc); pb-free c xc9536-15vq44c 15 ns vq44 44-pin very thin quad flat pack (vqfp) c xc9536-15vqg44c 15 ns vqg44 44-pin very thin quad flat pack (vqfp); pb-free c xc9536-15pc44i 15 ns pc44 44-pin plastic lead chip carrier (plcc) i xc9536-15pcg44i 15 ns pcg44 44-pin plastic lead chip carrier (plcc); pb-free i xc9536-15vq44i 15 ns vq44 44-pin very thin quad flat pack (vqfp) i xc9536-15vqg44i 15 ns vqg44 44-pin very thin quad flat pack (vqfp); pb-free i notes: 1. c = commercial: t a = 0 to +70c; i = industrial: t a = ?40 to +85c. date version revision 12/04/98 5.0 revised datga sheet to remove pci compliancy statement and remove t lf . 06/18/03 6.0 updated format. 08/21/03 6.1 updated package device marking pin 1 orientation. 04/15/05 6.2 added asynchronous preset reset pulse width specification (t aprpw ) 04/03/06 6.3 added warranty disclaimer. added pb-free package ordering information. device ordering and part marking number speed (pin-to-pin delay) pkg. symbol no. of pins package type operating range (1)
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